USB 3.0 Overview and Physical Layer testing requirements Industry update and Testing Challenges Update
Jim Choate Agilent Technologies
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Agenda Introduction Agilent Digital Standards USBIF Compliance Program Status USB Specification Updates Physical Layer Testing ECN changes to Physical Layer Testing Physical Layer Compliance Test Pitfalls
Precision Probe and Cable Summary Questions
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April 5, 2013
Agilent Digital Standards Program • Our solutions are driven and supported by Agilent experts involved in international standards committees: • • • • • • •
Joint Electronic Devices Engineering Council (JEDEC) PCI Special Interest Group (PCI-SIG®) Video Electronics Standards Association (VESA) Serial ATA International Organization (SATA-IO) USB-Implementers Forum (USB-IF) Mobile Industry Processor Interface (MIPI) Alliance And many others
• We’re active in standards meetings, workshops, plugfests, and seminars . • We get involved so you benefit with the right solutions when you need them SuperSpeed USB Page 3
We understand your future requirements, because we help shape them
Rick Eads PCI-Sig Board Member
Jim Choate USB-IF Compliance Committee USB 3.0 Electrical Test Spec WG
Brian Fetz DisplayPort Phy CTS Editor VESA Board Member
Min-Jie Chong SATA 6G / PHY / LOGO Contributor SATA-IO Gold Suite Lead
Perry Keller JEDEC Board Member
The Agilent Infiniium Scopes team maintains engagement in the top high tech standards organizations
USB Implementers Forum, inc (USB-IF)
USBIF Board Members Intel, NEC, HP, Microsoft, ST-Ericsson, LSI
OTG WG
CabCon WG
Compliance Review Board
Test Spec WG
Compliance Committee influences
Agilent Active Membership
owner
USB2/USB 3 Tools and Test Procedures Training and equipment
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USB Test Specs
responsible
Device WG
owner
Marketing WG
influences
Test House Approval
Interop. Workshop Testing
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Worldwide Shipment of USB-enabled Devices • USB is the most successful interface in the history of PC • Device charging over USB has become a major consumer feature • USB installed base is 10+ billion units and growing at 3+ billion units a year • Adoption is virtually 100% in PC and peripheral categories USB-enabled Device Shipments and Forecast: 2009 - 2015 Units in Thousands
902M
5,000,000
436M
4,500,000
77M
4,000,000 3,500,000 3,000,000 2,500,000 2,000,000 1,500,000 1,000,000 500,000 0
2009
2010
2011
USB Low or Full Speed Source: In-Stat, May 2011
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2012
2013
2014
USB High Speed
2015 USB SuperSpeed
April 5, 2013
USB-IF Specification updates and additions
• HSIC – a low power USB chip to chip solution designed for mobile applications • SSIC – USB 3.0 performance extension for chip to USB 3.0 SuperSpeed above Link Layer chip solution designed for mobile applications (download with USB 3.0 spec). Uses M-PHY for physical layer. • USB Power Delivery Spec– an expansion of USB power delivery to allow more flexible power delivery up to 100W. Power direction is no longer fixed. http://www.usb.org/developers/powerdelivery/
• All USB-IF specifications are available at http://www.usb.org/developers/docs/
Key Features of the USB Power Delivery Spec
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10Gbps SuperSpeed overview • Specification near version 0.7. Industry review scheduled for Feb 7th, 2013 Key characteristics of the higher-rate SuperSpeed USB solution include: • 10 Gbps USB data rate • Compatibility with existing cables and connectors • 128b/130b (TBD) data encoding for more efficient data transfer leading to higher throughput and improved I/O power efficiency • Compatible with existing USB 3.0 software stacks and device class protocols
• Compatible with both existing 5 Gbps and new 10 Gbps USB 3.0 hubs and devices, as well as USB 2.0 products
10Gbps SuperSpeed considerations • Re-driver design considerations – must be designed with re-drivers accounted for in specification budgets. • Speed negotiation handshake • Channel definitions. • 10Gbps SuperSpeed USB Industry Review Conference – register by Feb 1st. • Conference will review rev 0.7 draft specification • Go to http://www.usb.org/developers/USB-Futures.pdf For updates and information.
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USBIF – USB 3.0 Certification Test Requirements
Electrical Test Equipment and USBIF test software
Protocol Test Equipment and USBIF test software
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What does USB Certification mean https://www.usb.org/kcompliance/ilist (Access for USBIF Members Only)
Products listed on the Integrators list (member optional)
Certification also allows member company to use the official USBIF logo(s) on their product and marketing materials. • Tests run at USB-IF Compliance Test Workshop • Testing with approved Independent Test Labs • Testing at USB-IF Platform Interoperability Lab (PIL – only for hosts/hubs)
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Agilent USB Workshop Testing solutions USB 3.0 Electrical Gold Suite Tx Testing •DSA91304A/X Oscilloscopes RX Testing •N4903B J-BERT •N4916A/B D-box
USB 2.0 Electrical Gold Suite
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Protocol Testing Test and debug Interop issues, Backward compatibility, software and firmware
ENA TDR Cable Testing
Tx Testing •DSA9254A
ENA 5071C with option TDR
RX Testing •81134A or 81130A
Informational •Cable Testing •Connector Testing •Device, hub and host testing
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USB2.0 Basics – General Universal Serial Bus (USB) 2.0: All USB specifications are owned by the USB-IF (Implementers Forum, Inc.) USB2.0 is an EXTENSION of USB1.1 USB-IF states USB2.0 is the CURRENT ver. of the USB. USB1.1 is available for historical reference only.
USB 2.0 Has 3 Transfer Speeds
USB2.0
HS USB1.1 LS/FS
– Low Speed (LS) = 1.5Mbps – Full Speed (FS) = 12Mbps – Hi-Speed (HS) = 480Mbps
USB 3.0 Has 1 Transfer Speed
– Superspeed (SS) = 5Gbps
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USB 3.0 5G SS 10G SS+
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USB2.0 Basics - Architecture USB Architecture
Host / System Down stream
Hub Up stream
Devices
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• • • •
Differential Signal Max USB cable length of 5m Up to 5 Hubs Data from PC to the device is called Downstream • Data from device to PC is called Upstream USB Cable + Shield
VBUS D+ DGround April 5, 2013
USB2.0 Basics - Signal Rates & Levels
Sig Rate Sig Level Rise and Fall Times
Low Speed 1.5Mbps 3.3V 75ns < Tr 500ps*
*High Speed USB edge rate compliance measurement method and pass/fail criteria have been changed. This will be explained in the compliance requirements section.
Host test requirements
http://www.usb.org/developers/docs#comp_test_procedures
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Which Host Eye is Correct?
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April 5, 2013
New USBIF Required USB2 SQ Test Fixtures
Note: USBIF fixture does not have switching relay + Gives host SQ more margin - Cannot make any other meaurements with this fixture - Embedded hosts need to enumerate VID/PID EH compliance fixture to go into test packet mode
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What is different for USB 3.0 USB 2.0 High Speed
USB 3.0 SuperSpeed
480Mbps
5 Gbps
NRZI, Half Duplex
8B/10B PRBS, Full Simplex
4 signals
8 signals 4 USB2 , 4 SS Signals
Dp, Dm, VCC, GND Cable Lmax= 5meter
Cable Lmax= 3 meters
IconfigLP/FP = 100mA/500mA
IconfigLP/FP = 150mA/900mA
Isuspend = 2.5mA No SSC
SSC
TX SQ at Near End
TX at End of Channel (Far end)
No Host RX testing
RX Jitter tolerance RX
Half Duplex TX RX
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Isuspend = 2.5mA
TX RX
TX
Full Simplex TX
RX
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Biggest Challenges for USB 3.0 Testing • Receiver testing • Getting DUTs into loopback • Margins are tight
• EMI interference issues have been reported with WiFi. • ECNs
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April 5, 2013
U7243A USB 3.0 TX Compliance Application Agilent’s U7243A TX compliance test application
TX tests: •LFPS (Near end) •SSC (Near end) •TX (Far End: TP1) •Eye Pattern •Tj, Rj, Dj •Amplitude “Embedded channel” automatically tested using Agilent U7243A compliance software
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Transmitter test requirements
(TX Far End)
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Tx testing emulated through s-parameters Embed Channel File “DEVICE_3MCABLE.s4p”
Validation with InfiniiSim of DSA91304A
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TX Testing Requirements: Polling.LFPS to compliance mode PING LFPS Toggles CMM
CP0 Dj CP1 Rj
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Toggling USB 3.0 TX test modes
•Connect Aux Out to DUT SSRX+ to toggle test modes
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Transmitter testing uses embedded compliance channel
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Compliance Channels •Compliance Channels are used to test TX and RX for worst case channel conditions •Back panel USB route solution •Channel loss will dominate •Host 11” of trace •Device 5” of trace •3 meter USB 3.0 cable
•Short Channel Compliance Channel will be Part of compliance requirements later this year. Short Channel = no cable and short PCB traces
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SuperSpeed Host Receiver Test Calibration and compliance channel •Device 5” of trace •3 meter USB 3.0 cable
Host Channel setup
SuperSpeed Device Receiver Test Calibration and compliance channel •Host 11” of trace •3 meter USB 3.0 cable
Device Channel setup
New channel definitions being defined
•Compliance Channels used need to change for products that use micro connectors/cables. •Device and host channel portion stays the same •Micro spec only allows 2 meter USB 3.0 cable today •Micro spec ECN is reducing that to 1 meter maximum in ECN under review.
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Fixtures and cables available from the USBIF at: http://www.usb.org/developers/estoreinfo/
New build of USB-IF Fixture kit now available
Old Fixture
New Fixture
New fixtures include improved SMA connectors 33
April 5, 2013
USB 3.0 SuperSpeed Receiver Test Setup for Devices with J-BERT B SER Counter Connect the equipment as shown below - Use DC blocking capacitors in the connection from the J-BERT/De-Box output to the test fixture input - For host testing: Additional cabling and a BIAS tee are required - All necessary connections are displayed in the N5990A software, too
N4903B
Device Test Fixture 1
USB
N4916B
11742A Blocking Caps
use upper Port
Device Test Fixture 2
DUT
3m USB3 cable
11‘
5V
Short USB3 cable
USB 3 Loopback Training
USB 3 Loopback Training
Typical SuperSpeed Link Turn-on Sequence
USB 3 Reciever Test Automation using N5990A automation sw
SuperSpeed Receiver Tests Rx Compliance and Jitter Tolerance Testing
SuperSpeed Receiver Test Calibration and compliance channels
Engineering Change Notices (ECNs)
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ECN 009 USB 3 (Standard-B Connector Near End Crosstalk)
•
If a Standard-B or Powered-B connector fails to meet the -32 dB requirement in frequency domain shown in Figure 5-24 (b), but is able to meet the -27dB requirement shown in Figure 5-24(a),
•
the measurement of DDNEXT in time domain will be required.
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ECN 009 USB 3 (Standard-B Connector Near End Crosstalk) – Measurement of DDNEXT
Measurement of DDNEXT in time domain.
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What is the Short Channel Definition & Why?
•
USB 3.0 Flash drives are the best example where short channels are the norm
•
For discrete hosts the xHCI controllers are frequently place very near the USB 3.0 connectors with very short PCB traces
•
In this use case the loss of the channel is very small and it is critical that RX equalizers have sufficient dynamic range to operate in a low loss channel environment
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USB3.0 Reference Equalizer ECN • Current testing reference equalizer is for a long channel • •
•
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3m cable plus long host PCB trace (~18-20dB differential insertion loss). proper equalizer behavior is critical for interoperability in a short channel (no cable and short host PCB, ~3-5dB differential insertion loss) ECN defines a second reference equalizer transfer function that is optimized for the short channel
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Physical Layer Compliance Pitfalls •Transmitter SSC quality •Loopback issues •Dut needs custom sequence •DUT drops out easily
Compliant SJ Poor/wrong SJ
Compliant SSC Profile
•Calibration issues •Inconsistent •Poor Sj/Rj mod •Automation of Cal
Intentional SSC Stress Non-deterministic noisy SSC
•Failing de-emphasis •Great impact on TJ and Eye •Jitter tolerance failures •10Mhz, 20Mhz, 33Mhz
Compliant De-emphasis Non-compliant Overshoot
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April 5, 2013
PrecisionProbe and Cable (N2809A)
Characterize and correct any input path to your oscilloscope input using only your oscilloscope
The Importance of a Flat Frequency Response Why do we care about a flat frequency response? - The flatter the response the more accurately the scope will depict the signal - Measurements become more repeatable - ISI modeled closer to the reality
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Frequency response of the 90000 X-Series
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Eye margin improvement using precision cable
23.8% Increase in eye height
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The Solution: PrecisionProbe PrecisionProbe Quickly and Easily: - Characterizes and corrects the frequency response (Vout/Vin) of phase of any probe and probe head combination - Characterizes and corrects for insertion loss caused by cables and fixtures - Characterizes and corrects for insertion loss caused by switches for probes and cables. - For a typical 10-12Ghz cable USB3 eye margin can improve 10-20mV 50
April 5, 2013
USB 3.0 Protocol Decode: on the scope
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NEW: Agilent N8900A InfiniiView Oscilloscope Analysis Software
•View, analyze, share and document from your PC •Free up your scope to actually make measurements •Operates just like the scope •Undock to better view result windows with multiple monitors 52
April 5, 2013
Agilent High Speed Inter-Chip test solutions •HSIC is a supplement to the USB 2.0 specification developed primarily by chip vendors to provide simpler and lower power interface between a USB host and device • Specification is included with USB 2.0 specification located here: http://www.usb.org/developers/docs/
•Agilent U7248A HSIC compliance test software •Used in conjunction with Agilent’s U5464A/B USB protocol triggering and decode software, developers have a complete set of tools to validate/debug HSIC solutions.
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USB 3.0 – Total Solution Transmitter Test N8805A USB3.0 U7243A USB Protocol decode & Compliance Test triggering SW Software
Interconnect Test
Receiver Test N5990A Automatic SW for USB compliance
Protocol Test (link/transaction layers)
SW U4612A Jammer DSOX90000A Infiniium real time scope
HW
E5071C Option TDR ENA Network Analyzer
N4903B J-BERT High-Perf Serial BERT U4611A/B USB 3\2\1.1 Analyzer
or DSO91304A Infiniium real time scope
with
De-emph N4916A or N4916B or N4903B-002 U7242A Test Fixture
Signal Conditioning
Fixture
DUT
U7242A USB 3.0 Test Fixture
Bit-USBCBL-0001 from BitifEye
Tx
Tx
Tx
Rx Cable
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USB3ET from USB-IF
Rx
Tx Rx
April 5, 2013
Conquering USB 3.0 Physical Layer Test Challenges USB 3.0 Protocol Development Don Schoenecker Agilent Technologies
Agenda Analyzing USB 2.0 and 3.0 MS Traffic Communication layers (power management) LTSSM Link Management Transaction layer Active Testing Questions
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Capturing USB data traffic Ethernet or PCIe control
Simultaneous 2.0 and 3.0 traffic USB 2.0 • 1.5 / 12 / 480 Mbps • Single HDX differential link • Polling • Token, Data, Handshake USB 3.0 • 5 Gbps • 2 unidirectional links • Device notification • Data, Handshake
USB test
DUT
USB 2.0/3.0 host ports
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Capturing USB 3.0 and 2.0 Simultaneously Transaction View
• Data capture of 2.0 and 3.0 mass store operations • USB protocol transactions are very different • Transaction are the same
SuperSpeed Bus Communications Layers and Power Management Elements
Timing events for link states
8b/10b Decode and display
LTSSM
Example Trace - POLLING.LFPS
X – O = 952ns tBurst time for Polling.LFPS
Example Trace – U1 Entry/Exit U2 Inactivity Timer is set to 256us. So Link silently entered into U2 after spending 256us in U1.
X-O = ~392us total time in Elec Idle
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Synchronizing the USB analysis traces from Protocol to Electrical • Diagnostic requires synchronization of protocol events to a physical trace on an Oscilloscope • Uses a physical connection between the two pieces of equipment •
SMA cable going from the ‘trigger out’ on the Agilent USB analyzer to the ‘trigger in’ on the Agilent scope.
•
The scope should be setup to trigger on an ‘high to low’ alternating signal.
Trig IN / Trig OUT for use with other Agilent equipment
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Active Testing Test environment Control • Three Methods – Golden Device
Command “B”
– Generator – Active Insertion - Jammer
Command “A”
What are the benefits of Active Insertion Testing? (Jammer) • Common Use operation - Error Injection • Scenario Testing – Protocol problem • Problem replication – SCSI command modification
April 5, 2013
Agilent U4612A USB 3.0 Jammer • Quickly and easily create test scripts to simulate real error conditions.
• Programmatic control of error conditions. • Can be used to create a variety of errors – – – – – – – –
PHY errors (Disparity, 8b/10b, align) CRC-5/16/32 errors Corrupted ordered sets, LMPs, etc. LGOOD_n / LCRD_a out of order Link connect / disconnect Power up / down (bus powered devices only) Missing or corrupt frames BOT (Bulk Only Transport) or UAS (USB Attached SCSI) Sense IU / Response IU errors
• Standalone unit (does not require U4611A/B analyzer)
Simple test Verifying Proper handling of errors Physical tests •
USB DUT
Command “B”
10b errors
Testing of Protocol Operations •
Agilent U4611A USB 2.0/3.0 Analyzer
Invalid Link commands (Link command words are not equal) – Command is ignored
•
Send two LMP packets with Header Sequence Numbers that are not sequential – Link goes into recovery
•
Wrong LCRD_X Sequence Test – Link Recovery
Agilent U4612A USB 3.0 Jammer
Command “A” USB Host “Golden Device”
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Jammer – Example tests Physical Layer stress testing - Insert 8b/10b error in data packet - 10b code error in packet framing Link Command testing
- Incorrect buffer sequence numbering - Link command response timeout Application Level testing - Force bypass of disk cache with SCSI command (FUA bit set)
- Insert bad data block in disk write
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USB 3.0 – Total Solution Transmitter Test N8805A USB3.0 U7243A USB Protocol decode & Compliance Test triggering SW Software
Interconnect Test
Receiver Test N5990A Automatic SW for USB compliance
Protocol Test (link/transaction layers)
SW U4612A Jammer DSOX90000A Infiniium real time scope
HW
E5071C Option TDR ENA Network Analyzer
N4903B J-BERT High-Perf Serial BERT U4611A/B USB 3\2\1.1 Analyzer
or DSO91304A Infiniium real time scope
with
De-emph N4916A or N4916B or N4903B-002 U7242A Test Fixture
Signal Conditioning
Fixture
DUT
U7242A USB 3.0 Test Fixture
Bit-USBCBL-0001 from BitifEye
Tx
Tx
Tx
Rx Cable
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USB3ET from USB-IF
Rx
Tx Rx
2012 was the breakout year of USB 3.0! • In 2012, 8 companies had certified USB 3.0 host controllers, a prerequisite to USB 3.0 connectivity • • • •
AMD ASMedia Etron Fresco Logic
• • • •
Intel Renesas TI VIA Labs
• Intel launched Ivy Bridge which includes support for USB 3.0, in 2012. •
http://www.theverge.com/2012/4/23/2967686/intel-launches-22nm-ivy-bridge-processors
• New Panther Point chipset designed for Ivy Bridge adds native USB 3.0 support • Microsoft Windows 8 supports USB 3.0
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Things to Remember if you forget all else Microsoft Windows 8 includes native support for USB 3.0 hosts, hubs and devices
Agilent’s USB 3.0 TX and RX test solutions are the worldwide market leader for USB 3.0 product development and validation
USB 3.0 Receiver testing is the most challenging part of PHY layer testing
Agilent provides the industries highest performance USB protocol analyzer and jammer
Agilent USB solutions adopted by test labs world wide Confidence in our solution comes from our leadership and participation in standards bodies as well as our deep technical expertise Agilent has the tools and expertise to help you conquer USB 3.0 Physical Layer Test Challenges
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*All trademarks are the properties of their respective holders.
Additional Links and References Agilent Oscilloscope information (TX testing solutions) www.agilent.com/find/scopes Agilent Oscilloscope application software http://www.home.agilent.com/agilent/product.jspx?nid=-35491.0.00&cc=US&lc=eng Agilent N4903B Jbert (Rx testing solutions) www.agilent.com/find/JBERT Agilent N8900A InfiniiView Oscilloscope Analysis Software www.agilent.com/find/InfiniiView Agilent N2809A PrecisionProbe oscilloscope probing software www.agilent.com/find/precisionprobe
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