6.976 Flat Panel Display Devices Lecture 14 Display Addressing and Driver Circuits
1. Display Addressing Basics 2. Passive Matrix Addressing 3. Active Matrix Addressing
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Display Addressing Basics • Electronic Display is a “language translator” that converts time sequential electronic signals into spatially configured photon signal • It does two principal functions – Routing of the electronic signal to the display element – Conversion of the electronic signal to photons Pankove
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Addressing Systems Domain Central Control
Non-Random Address Systems
Random Address Systems
Local Control
B&W CRT
Stroke Mode CRT
Passive Matrix
7-segment LCD
6.976 ST01 Flat Panel Display Devices
Cell Identity
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Standard Display Addressing Modes • Sequential Addressing (pixel at a time) – CRT, Laser Projection Display
• Matrix Addressing (line at a time) – Row scanning, PM LCD, AMLCD, FED, PDPs, OLEDs
• Direct Addressing – 7-sement LCD
• Random Addressing – Stroke-mode CRT
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What Display Characteristics Does Addressing Affect?
• • • • •
Color and Grey Scale Brightness and Luminance Frame Rate Resolution Video
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Effect on Luminance (1000 x 1000 Display)
Drive Scheme
Spot Brightness Required (x Average Screen Brightness)
Sequential
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Row Scanning
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Row Scanning with memory
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Direct Addressing
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Dimensionality of a Pixel Image • • • • • • • •
X location Y-location Time Luminance Dominant Wavelength Purity of Pixel Color Pitch of pixels in display Size or number of pixels in display
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Grey Shades GenerationTechniques Spatial Modulation
Frame Modulation
Individually selectable Areas per pixel area per dwell time
Reduced intensity by skipping frames per pixel area
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Amplitude Modulation
Analog intensity at full dwell time per pixel
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Color Generation Techniques Spatial Color
Sequential Color
Coincident Color
One broadband emitter per pixel area addressed three times per dwell time at three times the intensity.
Emitter
Filter Three selectable color areas per pixel area per dwell time at three times intensity
Electronic filter changed three times per dwell time.
Three selectable transparent color areas per pixel area per dwell time at one times intensity
•Dwell time is allotted for each pixel operation •Pixel area is total area allotted for spatial infomation 6.976 ST01 Flat Panel Display Devices
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Direct Addressing • Each segment require an independent circuit drive element • Each segment requires continuous application of voltage or current to the display element • For a N rows by Y columns display – M x N electrodes are required
Steemers, SID 94 Seminar Notes 6.976 ST01 Flat Panel Display Devices
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Sequential Addressing • Time is multiplexed – Signal exists in a time cell
• A pixel is displayed at a time – Single data line
• Rigid time sequence and relative spatial location of signal – Raster scan
• Data rate scales with number of pixels • Duty cycle scales with number of pixels Tannas, SID 00 Applications Seminar 6.976 ST01 Flat Panel Display Devices
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Matrix Addressing • Time multiplexed • Row at a time scanning – A column displayed during the time assigned to a row
• For a N rows by M columns display – M + N electrodes are required
• Row scanning rate scales with number of rows • Data rate scales with number of pixels • Duty cycle scales with number of rows Tannas, SID 00 Applications Seminar 6.976 ST01 Flat Panel Display Devices
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Non-Linearity Requirement • Discrimination Ratio (D) D=
L ON LOFF
• Pixel Contrast Ratio (PCR) PCR =
L ON + ( N −1) LOFF D N − 1 = + NLOFF N N
• For more than 10 rows and PCR=10 PCR =
D + 1 = 10 N
• For good contrast D = 9N
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Pixel Equivalent Circuits • Leaky Capacitor – LCD(TN, STN, CSTN), EL and PDP
• Diode – LCD MIM, CNT-FED, VFD, O-LED
• Three Terminals (independent control) – VFD, FED, AMLCD, CRT
• Switch with Memory – AMLCD, AMELD, FLCD, LCOS
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Direct Addressed LCD
Matsumoto
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Multiplex Drive LCD
Matsumoto
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Passive Matrix LCD (Two Terminal Pixel)
Tannas, SID 00 Applications Seminar 6.976 ST01 Flat Panel Display Devices
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Passive Matrix LCD (Two Terminal Pixel) • • • •
Diagram showing multiplex line-at-a-time addressing Lumped circuit is typically a lossy capacitor Line X2 is shown being addressed in the matrix Lines X1 to Xm are sequentially addressed or multiplexed once each frame time – Typically 60 – 80 frames a second
• Off voltage bias used to nullify the column line voltage in all rows except in row X2 Alt and Pleshko “Iron” Law 6.976 ST01 Flat Panel Display Devices
VON = VOFF opt Lecture 14
N +1 N −1 18
Amplitude Selection
Scheffer, SID 00 Seminar Notes 6.976 ST01 Flat Panel Display Devices
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Dual Scan Matrix Display Architectures
Dual Scan Matrix
Interdigitated Single Matrix
Scheffer, SID 00 Seminar Notes 6.976 ST01 Flat Panel Display Devices
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Selection Ratio
Scheffer, SID 00 Seminar Notes 6.976 ST01 Flat Panel Display Devices
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Grey Scale (sub-framing)
Scheffer, SID 00 Seminar Notes 6.976 ST01 Flat Panel Display Devices
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Multiple Line Addressing (Video Rate PMLCD) •
•
•
•
Frame response occurs when the LCD is fast resulting in less perceived brightness Active Addressing™ achieves rms-like response by introducing multiple selection pulses distributed throughout the frame Distribution of multiple selection pulses does not allow the LC director sufficient time to decay Dissipate less power than conventional STN-LCD
Scheffer, SID 00 Seminar Notes 6.976 ST01 Flat Panel Display Devices
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Multiple Line Addressing
Scheffer, SID 00 Seminar Notes 6.976 ST01 Flat Panel Display Devices
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Multiple Line Addressing Power Consumption
Scheffer, SID 00 Seminar Notes 6.976 ST01 Flat Panel Display Devices
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Driver Circuits
Row Driver Circuits
Display Pixel Array
Column Driver Circuits
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Row Driver Circuits • Shift Registers – N stage shift registers – Static vs Dynamic
N-stage shift register
• Level shifters – Match outside signal to signal on display
Level Shifters
• Output buffers – Typically bi-level
Buffers
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Column Driver Circuits • Shift Registers – N stage shift registers – Static vs Dynamic
N-stage shift register
• Level shifters
Sample and Holds or Comparators
– Match outside signal to signal on display
• Output buffers – Typically bi-level
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Analog or Digital Buffers
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Analog Data Driver Shift Registers
Shift Registers
Morozumi, SID 00 Seminar Notes 6.976 ST01 Flat Panel Display Devices
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Digital Data Drivers
Shift Registers
DACs
Morozumi, SID 00 Seminar Notes 6.976 ST01 Flat Panel Display Devices
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Active Matrix Addressing •Introduce non linear device that improves the selection. •Storage of data values on capacitor so that pixel duty cycle is 100% •Improve brightness of display by a factor of N (# of rows) over passive matrix drive •Display element could be LC, EL, OLED, FED etc
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Pixel Element
Yeh & Gu
Need TFTs to improve flat panel display performance !
Amorphous Silicon Poly Silicon Organic TFT 6.976 ST01 Flat Panel Display Devices
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