ILX511 - Ocean Optics

generator and clock drivers ensure single 5V power supply for easy use. ... Sony reserves the right to change products and specifications without prior notice.
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ILX511 2048-pixel CCD Linear Image Sensor (B/W) Description The ILX511 is a rectangular reduction-type CCD linear image sensor designed for bar code POS hand scanner and optical measuring equipment use. A built-in timing generator and clock drivers ensure single 5V power supply for easy use. Features • Number of effective pixels: • Pixel size: • • • • •

2048 pixels 14µm x 200µm (14µm pitch)

22 -pin DIP (CERDIP)

Pin Configuration (Top View)

Single 5V power supply Ultra-high sensitivity Built-in timing generator and clock-drivers Built-in sample-and-hold circuit Maximum clock frequency: 2MHz

Absolute Maximum Ratings • Supply voltage VDD • Operating temperature • Storage temperature

6 –10 to +60 –30 to +80

VOUT

1

22

VDD

1

V °C °C

GND

2

21

VDD

GND

3

20

VDD

SHSW

4

19

GND

øCLK

5

18

VGG

VDD

6

17

GND

NC

7

16

GND

NC

8

15

VDD

VDD

9

14

NC

NC 10

13

NC

12

GND

øROG 11

2048

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

–1–

E94108–TE

1

18

V OUT

VGG

20

21

22

13

14

15

16

17

S3 S2 S1 D32

D14 D13

–2– 7 NC

6 VDD

3 GND

GND

9 VDD

8 NC

øCLK

5

Clock Pulse Generator/ Sample-and-hold Pulse Generator

NC

10

Clock Drivers

19 SHSW GND

4

Mode Selector

CCD Analog Shift Register

Readout Gate

NC

NC

V DD

GND

GND

12

GND

øROG

11

Readout Gate Pulse Generator

D38 D37 D36 D35 D34 D33 S2048 S2047 S2046

2

Internal Structure Output Amplifier S/H Circuit

V DD

VDD

V DD

ILX511

Block Diagram

ILX511

Pin Description Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

Symbol VOUT GND GND SHSW øCLK VDD NC NC VDD NC øROG GND NC NC VDD GND GND VGG GND VDD VDD VDD

Description Signal output GND GND Switch (with S/H or without S/H) Clock pulse input 5V power supply NC NC 5V power supply NC Readout gate pulse input GND NC NC 5V power supply GND GND Output circuit gate bias GND 5V power supply 5V power supply 5V power supply

Mode Description

Recommended Voltage

Mode in Use With S/H Without S/H

Pin 4 (SHSW) GND VDD

Item VDD

Min. 4.5

Typ. 5.0

Max. 5.5

Input Clock Voltage Condition (Note) Item VIH VIL

Min. 4.5 0

Typ. 5.0 —

Max. 5.5 0.5

Unit V V

Note) This is applied to the all pulses applied externally (øCLK, øROG).

Input Pin Capacity Item Input capacity of øCLK pin Input capacity of øROG pin

Symbol CøCLK CøROG

Min. — —

–3–

Typ. 10 10

Max. — —

Unit pF pF

Unit V

ILX511

Electro-optical Characteristics (Ta = +25°C, VDD = 5V, Clock Frequency: 1MHz, Light Source = 3200K, IR Cut Filter: CM-500S (t = 1.0mm), Without S/H Mode) Item

Symbol

Min.

Typ.

Max.

Unit

Remarks

R1 R2 PRNU VSAT VDRK DSNU IL DR SE I VDD TTE ZO VOS

150 — — 0.6 — — — — — — 92.0 — —

200 1800 5.0 0.8 3.0 6.0 1 267 0.004 5.0 98.0 250 2.8

250 — 10.0 — 6.0 12.0 — — — 10.0 — — —

V/(lx • s) V/(lx • s) % V mV mV % — lx • s mA % Ω V

Note 1 Note 2 Note 3 — Note 4 Note 4 Note 5 Note 6 Note 7 — — — Note 8

Sensitivity 1 Sensitivity 2 Sensitivity nonuniformity Saturation output voltage Dark voltage average Dark signal nonuniformity Image lag Dynamic range Saturation exposure 5V current consumption Total transfer efficiency Output impedance Offset level

Notes: 1. For the sensitivity test light is applied with a uniform intensity of illumination. 2. Light source: LED λ = 660nm 3. PRNU is defined as indicated below. Ray incidence conditions are the same as for Note 1. PRNU =

4. 5. 6. 7. 8.

(VMAX-VMIN)/2 VAVE

x 100 (%)

The maximum output of all the valid pixels is set to V MAX , the minimum output to V MIN and the average output to VAVE. Integration time is 10ms. Typical value is used for clock pulse and readout pulse. VOUT = 500mV. DR = V SAT /V DRK . When optical integration time is shorter, the dynamic range sets wider because dark voltage is in proportion to optical integration time. SE = VSAT/R1 VOS is defined as indicated below.

D30

D31

D32

S1

V OUT

Vos

GND

–4–

*VOUT

øCLK

0

5

2

–5– D11

D10

D5

D4

1 D1

D30

D14

D13

S2048

S2047

S2045

S3

S2

Effective Picture Elements Signal (2048 pixels)

S4

D32 S1

D31

*Without S/H Mode (4-pin → V DD )

1-line Output Period (2086 pixels)

Optical Black (18 pixels)

S2046

D12

2088 or more clock pulses are required.

Dummy Signal (32 pixels)

D2

0

3 D3

øROG

2086 D37

D36

D35

D34

Dummy Signal (6 pixels)

D38

5

ILX511

Clock Timing Diagram (Without S/H Mode)

1

D33

V OUT

øCLK

0

5

2

–6– D9

D10

D5

D4

D3

D30

D13

D12

S2047

S2046

S3

S2

S1

Effective Picture Elements Signal (2048 pixels)

S4

D32

D31

1-line Output Period (2087 pixels)

Optical Black (18 pixels)

S2045

D11

2088 or more clock pulses are required.

Dummy Signal (33 pixels)

D1

1 D0

0

3 D2

øROG

2086 D36

D35

D34

Dummy Signal (6 pixels)

D37

5

ILX511

Clock Timing Diagram (With S/H Mode)

1 D38

S2048

D33

0

ILX511

øCLK Timing (For All Modes) t1

t2

øCLK

t4

t3

Item øCLK pulse rise/fall time øCLK pulse duty (Note 1)

Symbol t1, t2 —

Min. 0 40

Typ. 10 50

Max. 100 60

Unit ns %

Typ. 3000 3000 10 5000

Max. — — — —

Unit

Note 1) 100 x t4 / (t3 + t4)

øROG, øCLK Timing

øROG

t6

t8

t7

øCLK t9

t5

Item øROG,øCLK pulse timing 1 øROG,øCLK pulse timing 2 øROG pulse rise/fall time øROG pulse period

Symbol t5 t9 t6, t8 t7

Min. 0 1000 0 3000

–7–

ns

ILX511

øCLK, VOUT Timing (Note 1) (Note 3)

øCLK

t10

t11

VOUT

VOUT * (Note 2)

t12

Item øCLK-VOUT 1 øCLK-VOUT 2 øCLK-VOUT* (with S/H)

Symbol t10 t11 t12

Min. 40 55 10

Notes: 1) fck = 1MHz, øCLK pulse duty = 50%, øCLK pulse rise/fall time = 10ns 2) Output waveform when internal S/H is in use. 3) • indicates the correspondence of clock pulse and data period.

–8–

Typ. 115 120 165

Max. 280 205 240

Unit ns

ILX511

Spectral Sensitivity (typ.) (Ta = +25°C) 1.0

Relative Sensitivity

0.8

0.6

0.4

0.2

0 400

500

600

700 800 Wavelength (nm)

Spatial Frequency (cycles/mm) 7.1 14.3 21.4 28.6

1000

Dark Voltage Rate vs. Ambient Temperature (typ.)

MTF of main scanning direction (typ.) 0

900

35.7

1.0 10.0 Dark Voltage Rate

H — MTF

0.8 0.6 0.4

1.00

0.2 0

0.10 0

0.2

0.4

0.6

0.8

1

0

Normalized Spatial Frequency τ = 560nm

–9–

10

20 30 40 50 Ta — Ambient Temperature (°C)

60

ILX511

Current Consumption Rate vs. Clock Frequency (typ.)

Output Voltage Rate vs. Integration Time (typ.)

2.0

Current Consumption Rate

Output Voltage Rate

5

1

1.5

1.0

0.5

0.1

0 1

10

50

0

τ int — Integration Time (ms)

1.5

2.0

Offset Level vs. Ambient Temperature (typ.) 3.2 VOS — Offset Level (V)

3.2 VOS — Offset Level (V)

1.0

Clock Frequency (MHz)

Offset Level vs. V DD (typ.)

3.0

2.8

2.6

2.4 4.5

0.5

4.75

5 VDD (V)

5.25

5.5

3.0

2.8

2.6

2.4

–10–

0

20 40 Ta — Ambient Temperature (°C)

60

ILX511

Application Circuit (Without S/H Mode (Note)) 10µ/16V 5V

+

22

21

20

19

18

17

16

15

14

13

12

VDD

VDD

VDD

GND

VGG

GND

GND

V DD

NC

NC

GND

VOUT

GND

GND

SHSW øCLK

VDD

NC

NC

V DD

NC

øROG

1

2

3

6

7

8

9

10

11

4

5

+

3KΩ øCLK

øROG

0.01µ

22µ/10V

Output Signal 2SA1175

Note) This circuit diagram is the case when internal S/H is not used.

Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party and other right due to same.

–11–

ILX511

c) Be aware that any of the following can cause the glass to crack because the upper and lower ceramic layers are shielded by low-melting glass: (1) Applying repetitive bending stress to the external leads. (2) Applying heat to the external leads for an extended period of time with a soldering iron. (3) Rapid cooling or heating. (4) Applying a load or impact to a limited portion of the low-melting glass with a small-tipped tool such as tweezers. (5) Prying the upper or lower ceramic layers away at a support point of the low-melting glass. Note that the preceding notes should also be observed when removing a component from a board after it has already been soldered.

Notes on Handling 1) Static charge prevention CCD image sensors are easily damaged by static discharge. Before handling, be sure to take the following protective measures: a) Either handle bare handed or use non-chargeable gloves, clothes or material. Also use conductive shoes. b) When handling directly use a grounding band. c) Install a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image sensors. e) For the shipment of mounted substrates use cartons treated for the prevention of static charges. 2) Notes on handling CCD CERDIP package The following points should be observed when handling and installing this package: a) (1) Compressive strength: 39N/surface (do not apply any load more than 0.7mm inside the outer perimeter of the glass portion) (2) Shearing strength: 29N/surface (3) Tensile strength: 29N/surface (4) Torsional strength: 0.9Nm b) In addition, if a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the ceramic portion. Therefore, for installation, either use an elastic load, such as a spring plate, or an adhesive.

Upper Ceramic Layer

Lower Ceramic Layer

39N

(1)

Low-Melting Glass

3) Soldering a) Make sure the package temperature does not exceed +80°C. b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a grounded 30W soldering iron and solder each pin in less than 2 seconds. For repairs and remount, cool sufficiently. c) To dismount image sensors, do not use solder suction equipment. When using an electric desoldering tool, ground the controller. For the control system, use a zero cross type.

29N

29N

(2)

(3)

–12–

0.9Nm

(4)

ILX511

4) Dust and dirt protection a) Operate in clean environments. b) Do not touch glass plates by hand or have any object come in contact with glass surfaces. Should dirt stick to a glass surface blow it off with an air blower. (For dirt stuck through static electricity, ionized air is recommended.) c) Clean with a cotton swab and ethyl alcohol if the glass surface is grease stained. Be careful not to scratch the glass. d) Keep in case to protect from dust and dirt. To prevent dew condensation, preheat or precool when moving to a room with great temperature differences.

Package Outline

5) Exposure to high temperature or humidity will affect the characteristics. Accordingly, avoid storage or usage in such conditions. 6) CCD image sensors are precise optical equipment that should not be subjected to mechanical shocks. 7) Make sure the input pulse should not be –1V or below. 8) Normal output signal is not obtained immediately after device switch on. Use the output signal added 22500 pulses or above to øCLK clock pulse.

Unit: mm 22-pin DIP (400mil)

PACKAGE STRUCTURE PACKAGE MATERIAL

CERDIP

LEAD TREATMENT

TIN PLATING

LEAD MATERIAL

42ALLOY

PACKAGE WEIGHT

5.2g

1. Distance of the first pixel: (H, V) = (6.46 ± 0.8mm, 5.0 ± 0.5mm) 2. The height from the bottom to the sensor surface is 2.45 ± 0.3mm 3. The thickness of the cover glass is 0.8mm and the refractive index is 1.5

–13–