Oct 3, 2006 - Improper configuration of the General Purpose Control Logic ... This application note describes the problematic configurations that need to be.
TVP5150/A/AM1 INTREQ/VBLK/GPCL Pin Configuration Application Note Digital Video APPLICATION NOTE Improper configuration of the General Purpose Control Logic (GPCL) pin in the TVP5150AM1 decoder can cause problems with color. This application note describes the problematic configurations that need to be avoided and makes recommendations on how to use the pin correctly.
INTREQ/VBLK/GPCL Pin Description Pin 27 (in the QFP package) or B5 (in the BGA package) is an I/O pin that can be configured for different functions. It can be used to output interrupt requests when configured as INTREQ. It can be used to output the vertical blanking status of the output video when configured as VBLK. It can also be used as a general purpose I/O pin for controlling external logic when it is configured as GPCL. The function for which it is configured is determined by bits in I2C registers 0x03 and 0x0F. In GPCL mode, the data output on the pin is determined by the value of bit 6 in register 0x03.
GPCL Pin and Color Lock It is important to note that there might be some situations where having a pull-up on the GPCL pin or setting the pin as inactive may cause instability on the color lock. This is due to some sharing internal to the device of the registers that control the GPCL and the Color DTO. When using the TVP5150AM1, make sure the GPCL pin is configured correctly by ensuring the following: 1. That the GPCL pin is not programmed as 0 when register 0x0F bit 1 is 1. Program the pin to be GPCL output enabled; for example, by writing the value of 0x6D to register 0x03. 2. That the GPCL pin is not programmed to be inactive when there is a pull-up resistor on the GPCL pin. 3. If the GPCL pin is not configured as an output, then it must not be left floating. A 10-kΩ pulldown resistor is recommended if not driven externally. Descriptions of the bits in register 0x03 and 0x0F that are used to configure the function of the INTREQ/VBLK/GPCL pin are available in Figure 1 and Figure 2.
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October 3, 2006
Figure 1. Description of I2C register 0x03, including bits that configure the function of the INTREQ/VBLK/GPCL pin.
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