staff

where Is is saturation current, q is the charge of the electron 1.6x10-9 Coulombs, k is the .... 18. Notes. FT221/4 Electronics – 6 Log and AntiLog Amplifiers. 19.
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5.1 Dr. Yuri Panarin, DT021/4, Electronics

Introduction  Log and Antilog Amplifiers are non-linear circuits in which the output voltage is proportional to the logarithm (or exponent) of the input.  It is well known that some processes such as multiplication and division, can be performed by addition and subtraction of logs.  They have numerous applications in electronics, such as:

6. Log and AntiLog Amplifiers

• • • •

1

FT221/4 Electronics – 6 Log and AntiLog Amplifiers

Two basic circuits

Multiplication and division, powers and roots Compression and Decompression True RMS detection Process control

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Notes

 There are two basic circuits for logarithmic amplifiers • (a) transdiode and

Ri

(b) diode connected transistor

Ri

Q

Q

vi

vi

vo

vo

 Most logarithmic amplifiers are based on the inherent logarithmic relationship between the collector current, Ic, and the base-emitter voltage, vbe, in silicon bipolar transistors.

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5.2 Dr. Yuri Panarin, DT021/4, Electronics

Transdiode Log Amplifier

Notes

The input voltage is converted by R1 into a current, which then flows through the transistor's collector modulating the base-emitter voltage according to the input voltage.  The opamp forces the collector voltage to that at the noninverting input, 0 V  From Ebers-Moll model the collector current is

I c = I s (e qVbe / kT − 1) = I s (eVbe / VT − 1) ≈ I s ⋅ eVbe / VT  where Is is saturation current, q is the charge of the electron 1.6x10-9 Coulombs, k is the Boltsman’s constant 1.38x10-23 Joules, T is absolute temperature, VT is thermal voltage. I c = I s (e 38.6Vbe − 1) ≈ I s ⋅ e 38.6Vbe  For room temperature 300oK  The output voltage is therefore i Vout = −Vbe = −VT ln C  IS

 v  V  = − T lg i 2.3  Ri I S 

  Vin    =  − 0.0259 ⋅ ln Ri ⋅ Is    5

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Dynamic range of Log Amp.

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6

Notes

 Test: Discuss the factors limiting the dynamic range of transdiode log amplifier. Suggest the methods to increase dynamic range  (a) The output is a perfect log function when IC>>IS. For the small input Voltage (i.e. current) this limits the lower end of the dynamic range. Vbe / V Vbe / V qVbe / kT

I c = I s (e

− 1) = I s (e

 I + IS Vout = −Vbe = −VT ln C  IS

T

− 1) ≈ I s ⋅ e

 I  ≈ −VT ln C   IS

T

  

 To extend the lower end of the dynamic range use transistor with small IS., e.g. for LM394 IS =0.25pA FT221/4 Electronics – 6 Log and AntiLog Amplifiers

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5.3 Dr. Yuri Panarin, DT021/4, Electronics

Dynamic range of Log Amp.

Notes

 (b) At upper end of the dynamic range the limitations is due to the bulk resistance of base and emitter regions – rBE. Therefore Vbe must be corrected to I +I  Vbe = VT ln C S  + rBE I C  IS   output error is: actual output – ideal output  I (1 + p / 100)  I  − K ln i OutputError = K ln i IS    IS

  = K ln(1 + p / 100) 

 Typically rBE is in range from 0.25 Ω to 10 Ω  To extend the upper end of the dynamic range use transistor with small rBE.  e.g. for LM394 rBE =0.5 Ω 9

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Dynamic range of Log Amp.

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Notes

 (c) The second factor is non-idealities of opamp, i.e. input bias current IOS  I C + I OS  Vout = −VT ln 

IS

 

 and offset voltage VOS.  RI + RI OS − VOS   V + RI OS − VOS  = −VT ln i Vout = −VT ln C RI S RI S   

  

 this limits the lower end of the dynamic range  To extend the lower end of the dynamic range use ultra-low offset opamps or special offset nulling techniques.

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5.4 Dr. Yuri Panarin, DT021/4, Electronics

Dynamic range of Log Amp.

Notes

 For LM394 rBE =0.5 Ω, and IS =0.25pA (at room temperature). Estimate the log conformity error at IC=1mA, 100 µA and 10 µA.  For IS=1 mA the output error is 0.5Ω x 1mA= 0.5 mV.  Therefore 0.5mV = 26mV ln(1 + p / 100)  this gives p = (exp( 0.5mV / 26 mV ) − 1) ⋅ 100% ≈ 1.94%

    

Estimate the max dynamic range with-in log conformity 1% outputerror = 26mV ln(1 + 1% / 100%) ≈ 0.26mV

The upper limit is IC=0.26mV x /0.5 Ω =0.52 mA The lower limit is 0.25 pA / 1% =25 pA. The dynamic range is 0.52mA/25 pA=0.02 x 109 =2 x 107 FT221/4 Electronics – 6 Log and AntiLog Amplifiers

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Notes

Thermal and Frequency stability  This equation yields the desired logarithmic relationship over a wide range of currents, but is temperature-sensitive because of VT and IS resulting in scale-factor and offset temperature-dependent errors.  The system bandwidth is narrower for small signals because emitter resistance increases for small currents.  The source impedance of voltage signals applied to the circuit must be small compared to Ri. Omitting Ri yields a current-input log amp.  Using a p-n-p transistor changes the polarity of input signals acceptable but limits the logarithmic range because of the degraded performance of p-n-p transistors compared to n-p-n transistors

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5.5 Dr. Yuri Panarin, DT021/4, Electronics

IC Log Amps.

Notes

 These basic circuits needs additional components to improve the overall performance, i.e: • • • • •

to provide base-emitter junction protection, to reduce temperature effects, bulk resistance error and op amp offset errors, to accept bipolar input voltages or currents, and to ensure frequency stability.

 Such circuit techniques are used in integrated log amps: AD640, AD641, ICL8048, LOG100, 4127.  IC log amps may cost about ten times the components needed to build a discrete-component log amp.  Nevertheless, achieving a 1% logarithmic conformity over almost six decades for input currents requires careful design. FT221/4 Electronics – 6 Log and AntiLog Amplifiers

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Temperature Compensation  v vo = −VT ln i  R1I S 

  

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Notes

  

The equation for output voltage shows that the scale factor of the basic transdiode log amp depends on temperature because of VT and that there is also a temperature-dependent offset because of IS. Temperature compensation must correct both error sources. Figure (next slide) shows the use of a second, matched, transistor for offset compensation and a temperature-dependent gain for gain compensation.

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5.6 Dr. Yuri Panarin, DT021/4, Electronics

Temperature Compensation R1

Q1

vi

R4

D1

Notes

R3

+to Q2

V1

R2

vo Ir

 v  vo = −VT ln i   R1 I S 1 

 Temperature compensation in a transdiode log amp:  a second transistor (Q2) compensates the offset current (IS) and  a temperature-sensitive resistor (R4) compensates the scale factor VT FT221/4 Electronics – 6 Log and AntiLog Amplifiers

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22

Notes

Temperature Compensation  For transistors Q1 & Q2 we have

FT221/4 Electronics – 6 Log and AntiLog Amplifiers

 v   I  vBE1 = VT ln i  vBE 2 = VT ln r  R I  1 S1   IS2 

 where Ir is a reference, temperature-independent, current.  The output voltage will be   R   R   R   I I R  vo = v1 1 + 3  = (vBE 2 − vBE1 )1 + 3  = VT 1 + 3  ln r ⋅ S 1 1  R R 4     R4   I S 2 vi  4   Matched transistors (IS1 = IS2) will cancel offset.  In order to compensate the gain dependence on temperature, R4 must be much smaller than R3 and such that d(VT/R4)/dT = 0.  This requires dR4/R4 = dVT/VT (= l/T).  At T = 298 K, the temperature coefficient of R4 must be 3390 x 10-6K.  D1 protects the base-emitter junction from excessive reverse voltages.

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5.7 Dr. Yuri Panarin, DT021/4, Electronics

Notes

Stability Considerations  Transdiode circuits have a notorious tendency to oscillate due to the presence of an active element in the feedback that can provide gain rather than loss.  Consider the voltage-input transdiode. Ignoring op amp input errors, we have Vn = Vi − R ⋅ I c and  Vo = −VBE  The feedback factor β for a given value of Vi, R Q  is determined as

β = dVn / dVo = R ⋅ dI c / dVBE

vi  Differentiating IC and using the fact that  Ic = Vi/R, we obtain β = R ⋅ I c / VT = Vi / VT  vo  indicating that β can be greater than unity.  For instance, with Vi = 10 V we have β = 10/0.026 = 400 = 52 dB, indicating that in the Bode diagram the |1/β | curve lies 52 dB below the 0 dB axis.  Thus, the |1/β| curve intersects the |a| curve at fc >> ft, where the phase shift due to higher-order poles is likely to render the circuit unstable; an additional source of instability is the input stray capacitance Cn FT221/4 Electronics – 6 Log and AntiLog Amplifiers

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26

Notes

Range Considerations  The transdiode circuit is compensated by means of an emitter resistor RE to decrease the value of β and a feedback capacitor CF to combat Cn, as shown.  To investigate its stability, refer to the incremental model, where the BJT has been replaced by its common-base small-signal model.

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5.8 Dr. Yuri Panarin, DT021/4, Electronics

Range Considerations 

Notes

Transistor parameters re and ro depend on the operating current Ic,

re = αVT / I C ≈ VT / I C

ro = V A / I C

 where VA is called the Early voltage (typically ~ 100 V). Cµ is the basecollector junction capacitance. Both Cµ and Cn are typically ~10 pF range.

R1 = R || ro || (rd + R ) and R 2 = re + RE



KCL at the summing junction yields



Eliminating ie and rearranging yields

vn (1 / R1 + jω (Cn + C µ ) ) + α ⋅ ie + jωC F (vn + vo )

vn 

1 + jωR1C1 1 + jωR 2C F = vo R1 R2

where ie=-vo/R2 and C1=Cn+Cµ+CF

1 vo R 2 1 + jωR 2C F ≡ = β vn R1 1 + jωR1C1 FT221/4 Electronics – 6 Log and AntiLog Amplifiers

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Notes

Range Considerations 1 vo R 2 1 + j ( f / f z ) 1 1 where f z = and f p = = = ⋅ β vn R1 1 + j ( f / f p ) 2πR1C1 2πR 2C F  The | 1/b| curve has a low-frequency asymptote at R2/R1, a high-frequency asymptote at C1/CF, and two breakpoints at f=fz and f= fp.  While C1/CF and fz are constant, R2/R1 and fp depend on the operating current IC. As such, they can vary over a wide range of values.

The hardest condition is when Ic = Ic(max), since this minimizes the value of R2/R1 while maximizing that of fp,. As a rule of thumb, RE is chosen to make R2(min)/R1 ~ 0.5 for a reasonably low value of |β |max, CF is chosen to make fp(max) ~ 0.5 fc for reasonable phase margin.

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5.9 Dr. Yuri Panarin, DT021/4, Electronics

Speed of Response

Notes

 As the input level is decreased, we witness an increasing dominance of fp , which slows down the dynamics of the circuit.  Since at sufficiently low current levels re>>RE, we have fp=1/(2πreCF)  The corresponding time constant is τ = reCF=(VT/IC)CF =(VT/ Vi)RCF indicating that τ is inversely proportional to the input level, as expected.  For instance, with Ic = 1 nA and Cp = 100 pF, we have τ = (26 x 10-3/10-9) x 100 x 10-12 = 2.6 ms.

It takes 4.6 τ for an exponential transition to come within 1 percent of its final value, therefore our circuit will take about 12 ms to stabilize to within 1 percent. This limitation must be kept in mind when operating near the low end of the dynamic range. FT221/4 Electronics – 6 Log and AntiLog Amplifiers

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Diode-connected Log Amp

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Notes

 In the second circuit a BJT connected as a diode to achieve the logarithmic characteristic.  The analysis is the same as above for the transdiode connection, but the logarithmic range is limited to four or five decades because the base current adds to the collector current.  On the pro side, • the circuit polarity can be easily changed by reversing the transistor, • the stability improves, and • the response is faster.

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5.10 Dr. Yuri Panarin, DT021/4, Electronics

Notes

Input Current Inversion  The basic log amp in only accepts positive input voltages or currents.  Negative voltages or currents can be first rectified and then applied to the log amp, but this adds the errors from the rectifier.  Alternatively, the log amp can be preceded by a precision current inverter.  The current inverter in Figure below uses two matched n-p-n transistors and a precision op amp to achieve accurate current inversion.  The collector-base voltage in both Q1 and Q2 is 0 V, so that the Ebers-Moll model for BJT transistors leads to

ie1 = I ES 1 (e vBE 1 / VT − 1)   ie 2 = I ES 2 (e vBE 2 / VT − 1)  where IES1 and IES2 are the respective emitter saturation currents of Q1 and Q2.

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Notes

Input Current Inversion  From circuit inspection, assuming an op amp with infinite open-loop gain but finite input currents and offset voltage, ie1 = ii + I b1 

io = ii 

 

  = v BE1 + Vio  

ie 2 = io + I b 2

Solving for the output current in terms of the input current yields

v BE 2

 I  I ES 2 Vio / VT + I ES 2 1 + b1 eVio / VT − I ES 2 − I b 2 e I I ES 1 ES 1  

which shows that, in order to have small gain and offset errors, the offset voltage must be small compared to VT, the op amp offset current must be small compared to the input current, and Q1 and Q2 must be matched.

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5.11 Dr. Yuri Panarin, DT021/4, Electronics

Exponential Amplifiers

Notes

 An exponential or antilogarithmic amplifier (antilog amp), performs the function inverse to that of log amps:  its output voltage is proportional to a base (10, e) elevated to the ratio between two voltages.  Antilog amps are used together with log amps to perform analog computation.  Similar to Log Apms there are two basic circuits for logarithmic amplifiers • (a) transdiode and • (b) diode connected transistor

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Notes

Antilog Amplifier  Interchanging the position of resistor and transistor in a log amp yields a basic antilog amp.  The base-collector voltage is kept at 0 V, so that collector current is given by ic ≈ I s ⋅ exp(v BE / VT )  vo = iC R1 = I S R1 exp(−vi / VT )  and for negative input voltages we have:  There is again a double temperature dependence because of IS and VT.  Temperature compensation can be achieved by the same technique shown for log amps.

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5.12 Dr. Yuri Panarin, DT021/4, Electronics

Notes

Temperature Compensation      

The input voltage is applied to a voltage divider that includes a temperature sensor. If R3 ic1 ≈ I s1 exp(vBE / VT ) = Vr / R5 » R4, vBC1 ~ 0V and applying to Q1 yields I c = I s (exp(vBE / VT ) − 1) where Vr is a reference voltage and we have assumed VBE1>>VT (25 mV). In Q2 VBC2 = 0V and hence : ic 2 ≈ I s 2 exp( vBE 2 / VT ) = Vo / R 5 Also: R4 vi = vBE1 − vBE 2 R 4 + R3 Substituting vBE1 and vBE2, and solving for vo, if Ql and Q2 are matched yields v R1 R4 vo ≈ Vr exp( − i ) R5 VT R3 + R 4

Therefore, if the temperature coefficient of R4 is such that

dR4/R4 = dVT/VT = l/T the voltage divider will compensate for the temperature dependence of VT. At T = 298 K, the temperature coefficient of R4 must be 3390 x 10-6K. FT221/4 Electronics – 6 Log and AntiLog Amplifiers

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Log-Antilog

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Notes

 Log and antilog amp circuits include the same elements but arranged in different feedback configurations.  Some integrated log amps have uncommitted elements allowing us to implement antilog amps.  Some IC (like ICL8049) are a committed only antilog amp.  Some so-called multifunction converters (AD538, LH0094, 4302) include op amps and transistors to simultaneously implement log and antilog functions, or functions derived thereof, such as • • • •

multiplication, division, raising to a power, or taking a root

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5.13 Dr. Yuri Panarin, DT021/4, Electronics

Notes

Basic Multiplier  Multipliers are based on the fundamental logarithmic relationship that states that the product of two terms equals the sum of the logarithms of each term.  This relationship is shown in the following formula: ln(a x b) = ln a + ln b  This formula shows that two signal voltages are effectively multiplied if the logarithms of the signal voltages are added.

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Multiplication Stages

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Notes

 The multiplication procedure take three steps: 1. 1. To get the logarithm of a signal voltage use a Log amplifier. V1 = ln(V1 ) and V2 = ln(V2 ) *

*

2. 2. By summing the outputs of two log amplifiers, you get the logarithm of the product of the two original input voltages. VO* = V2* + V2* = ln(V1 ) + ln(V2 ) = ln(V1 ⋅V2 )

3. 3. Then, by taking the antilogarithm, you get the product of the two input voltages as indicated in the following equations: VO = exp(VO* ) = exp[ln(V1 ⋅V 2) ] = V1 ⋅ V2 FT221/4 Electronics – 6 Log and AntiLog Amplifiers

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5.14 Dr. Yuri Panarin, DT021/4, Electronics block diagram of an analog multiplier

Notes

 The block diagram shows how the functions are connected to multiply two input voltages.  Constant terms are omitted for simplicity.

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Basic Multiplier Circuitry

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Notes

The outputs of the log amplifier are stated as follows: V  Vout (log1) = − K1 ⋅ ln in1   K2  V  Vout (log 2) = − K1 ⋅ ln in 2   K2 

where K1 = 0.025 V, K2 = R⋅Iebo and R = R1 = R2= R6. The two output voltages from the log amplifiers are added and inverted by the unity-gain summing amplifier to produce the following result:

 V   V  Vout ( sum ) = K1 ⋅ ln in1  + ln in 2  =  K 2    K2   Vin1 ⋅ Vin 2  = K1 ⋅ ln 2   K2 

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5.15 Dr. Yuri Panarin, DT021/4, Electronics

Notes  This expression is then applied to the antilog amplifier; the expression for the multiplier output voltage is as follows: 1  Vout ( sum )   V ⋅ V   = − K 2 ⋅ exp K1 ⋅ ln in1 2 in 2  = Vout (exp) = − K 2 ⋅ exp K K 1 1    K 2    V ⋅V  V ⋅V = − K 2  in1 2 in 2  = − in1 in 2 K2  K2 

 The output of the antilog (exp) amplifier is a constant (1/K2) times the product of the input voltages.  The final output is developed by an inverting amplifier with a voltage gain of — K2.

 V ⋅V  Vout = − K 2  − in1 in 2  = Vin1 ⋅ Vin 2 K2   57

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Four-Quadrant Multipliers

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Notes

 Four-Quadrant Multiplier is a device with two inputs and one output. V1 Vout

Vout = k ⋅ V1 ⋅ V2

V2

 Typically k = 0.1 to reduce the possibility of output overload.  It is called four-quadrant since inputs and output can be positive or negative.  An example device is Motorola MC1494, powered by ± 15 V power supply FT221/4 Electronics – 6 Log and AntiLog Amplifiers

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5.16 Dr. Yuri Panarin, DT021/4, Electronics

Multiplier Applications

Notes

 Alongside the multiplication Multipliers have many uses such as: • • • • •

Squaring Dividing Modulation / demodulation Frequency and amplitude modulation Automatic gain control

61

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Notes

AM & Squaring  Amplitude Modulation VLF

Vout

VRF

 Squaring circuit Vin

Vout

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5.17 Dr. Yuri Panarin, DT021/4, Electronics

Notes

Divider by feedback  Divider

Vm = K ⋅ Vx ⋅ Vout i1 =

Vin R1

i2 =

Vm R2

Vin = −Vm = − K ⋅ Vx ⋅Vout Vout =



Vm Vin =− K ⋅ Vx K ⋅ Vx

Square root: If Vx = Vout Vout = −

Vin K ⋅ Vout

Vout =

− Vin K

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Test problems Sketch the diagram for transdiode log amplifier and define its gain. Describe the stability problem of this circuit. Suggest the model to improve stability range. Use the BJT common –base small-signal model shown on the Figure.

4.

In this circuit let R=10 kΩ, 1 mV < Vi < 10 V, Cµ + Cn = 20 pF, VA = 100 V, rd = 2 MΩ, and f1= 1 MHz. Find suitable values for Cf and RE. For this circuit, find the time needed for output voltage to come within 1 % of its final value (in worst case). Discuss the factors limiting the dynamic range of transdiode log amplifier. Suggest the methods to increase dynamic range For LM394 rs ==0.5 Ω, and IS =0.25pA (at room temperature). Estimate the log conformity error at IC=1mA, 100 µA and 10 µA. Estimate the max dynamic range with-in log conformity 1%

6. 7. 8.

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Notes

1. 2. 3.

5.

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5.18 Dr. Yuri Panarin, DT021/4, Electronics

Notes 

Transistor parameters re and ro depend on the operating current Ic,

ro = V A / I C

re = αVT / I C ≈ VT / I C

 where VA is called the Early voltage (typically ~ 100 V). Cµ is the basecollector junction capacitance. Both Cµ and Cn are typically ~10 pF range.

R1 = R || ro || (rd + R ) and R 2 = re + RE



KCL at the summing junction yields



Eliminating ie and rearranging yields

vn (1 / R1 + jω (Cn + C µ ) ) + α ⋅ ie + jωC F (vn + vo )

vn 

1 + jωR1C1 1 + jωR 2C F = vo R1 R2

where ie=-vo/R2 and C1=Cn+Cµ+CF

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Analogue Multipliers

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Notes

 In analog-signal processing the need often arises for a circuit that takes two analog inputs and produces an output proportional to their product.  Such circuits are termed analog multipliers.  There are two different approaches to analog multipliers  One of them is based on log/antilog amplifiers  Another utilizes the exponential transfer function of bipolar transistors (Gilbert cell) .  In following sections we consider applications of IC multipliers based on log/antilog amplifiers

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5.19 Dr. Yuri Panarin, DT021/4, Electronics

Notes

Log/Antilog Converter  The log and antilog functions can be combined in slide rule fashion to perform such operations as • multiplication, • division, • exponentiation, and

• root computation.  With the help of simple op amp circuitry it can be configured for additional operations, such as • multifunction conversion and • non-integer exponent approximations, • coordinate conversion, and • true rms-to-dc conversion.  Although now the tendency is to implement these functions digitally, considerations of cost and speed often require their implementation in analog hardware. FT221/4 Electronics – 6 Log and AntiLog Amplifiers

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Multifunction Converters 

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Notes

A multifunction converter (4302) is a circuit that accepts three inputs, Vx, Vy, and Vz and yields an output Vo of the type: m

Vo = KV y Vz   Vx  where K is a suitable scale factor (typically K = 1), and m is a user-programmable exponent, in the range 0.2 < m < 5 where K is a suitable scale factor (typically K = 1), and m is a userprogrammable exponent, in the range 0.2 < m < 5 By proper selection of input configuration and exponent, the circuit can be programmed for a variety of operations:

Vo = VxV y , Vx / Vz , Vzm ,

n

Vz , 1 / Vx etc.

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5.20 Dr. Yuri Panarin, DT021/4, Electronics

Notes

4302 block diagram  The circuit diagram of 4302 is shown with frequency compensation and reversepolarity protection omitted for simplicity. Vy V V  By op amp action, we have V I z = z Io = o Ix = x I y = Rz Ro Ry Rx

The voltages at pins 6 and 12 are proportional to the log ratios of the corresponding currents:

I  V6 = VT ln z   Ix  I  V12 = VT ln o   Iy    FT221/4 Electronics – 6 Log and AntiLog Amplifiers

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m=1    

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Notes

1. V6 and V12 are derived directly from V11 so that V6 = V12 = V11 . By V6 = VT ln (I z / I x ) = V12 = VT ln (I o / I y ) this implies Iz/Ix = Io/Iy that is, Vz/Vx = Vo/Vy. Thus,

V  Vo = V y  z   Vx 

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5.21 Dr. Yuri Panarin, DT021/4, Electronics

Notes

m1     

2. m < 1: V6 is derived directly from V11 while V12 is derived from V11 via a voltage divider, V12=mV11, where m=R2/(R1+R2). Letting V12=mV6 yields , ln(I o / I y ) = m ln( I z / I x ) = ln( I z / I x ) m that is, (Io / I y ) = (I z / I x )m This, in turn, yields , (Vo / Vy ) = (Vz / Vx ) m that is, m

V  R2 Vo = V y  z  , where m = 1: V12 is derived directly from V11 while V6 is derived from V11 via a voltage divider, V6=(1/m)V11, where (1/m)=R2/(R1+R2). Letting V6=V12/m yields m

V  R1 + R 2 Vo = V y  z  , where m = >1 R2 V  x FT221/4 Electronics – 6 Log and AntiLog Amplifiers

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Multiplication and Division

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Notes

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5.22 Dr. Yuri Panarin, DT021/4, Electronics

Exponentiator - Root Extractor

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Notes

4302 Adjustment  In each configuration the scale factor is calibrated by setting the input(s) to 10 V and adjusting Ry for Vo = 10 V.  To maintain the accuracy of division at low signal levels, the input offset errors of the X and Z op amps must be nulled as follows  1. With Vz = Vx = 10.0 V, adjust R1 for Vo = 10.0 V.  2. With Vz = Vx = 100 mV, adjust R2 for Vo = 10.0 V.  3. With Vx = 100 mV and Vz = 10.0 mV, adjust R3 for Vo 1.00 V.  Repeat the procedure, if necessary.  The 4302 provides the following accuracies: • multiply, ±0.25 percent; • divide, ±0.25 percent; • square, ±0.03 percent;

• square root, ±0.07 percent.

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5.23 Dr. Yuri Panarin, DT021/4, Electronics

Notes

Test (2004 Suppl.) 

  

The circuit diagram of 4302 is shown in Fig.2 with frequency compensation and reversepolarity protection omitted for simplicity. Assume that RX = RY = RZ = RO. The pins 6, 11, 12 are connected as follows where R1=R2= 15 kΩ. Find the expression for Output Voltage VO. [13 marks] (c) Make appropriate changes/connections to produce expression for Output Voltage [5 marks] V = 5⋅ 3 V /V o

1

2

RY VY

iY

QY

QO

iO

RO

13

AY

VX

1

VZ

7

RX

iX

RZ

iZ

AO

QZ

2

VO

QX

AY

AO

6

11

12

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4302 Test V  Vo = V y  z   Vx 

Vo = 5 ⋅ 3 V1 / V2

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Notes

m

1. m=1/3, pins 6 and 11 are short circuit, pin 12 – volt. divider 2. m=R2/(R1+R2)=1/3, 3 R2=R1+R2, R1=2 R2 3. 4. 5. 6.

V1 is connected to pin VZ V2 is connected to pin VX pin VY is connected to +5 V R3=2R4 is voltage divider for +5V +15V

15V 14

VY

13

Vx

1

VZ

7

-15V 10

3

2

4302

Vo

R3 6

+5V

11

12

R4 R1

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5.24 Dr. Yuri Panarin, DT021/4, Electronics

4302 Test

4302 Test

V  Vo = V y  z   Vx 

Vo = 16 ⋅V1 / V 24

m

15V

-15V

14

VY

V  Vo = V y  z   Vx 

Vo = 2 ⋅V1 / V2

10

15V

3

13

VY Vx

1

VZ

7

VZ

7

6

93

12

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4302 Test

V  Vo = V y  z   Vx 

m

14

V  Vo = V y  z   Vx 

Vo = V13 /V22

15V

VY

11

Vo

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4302 Test Vo = 2 ⋅V1 V2

2

12

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3

4302

1

11

10

13

Vo

Vx

6

-15V

14

2

4302

m

-15V 10

15V

3

13

14

2

4302

VY

13

1

Vx

1

VZ

7

VZ

7

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12

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2

6

95

-15V 10

4302

Vo

Vx

6

m

11

Vo

12

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